Charge pump circuit and a novel capacitor for a memory integrated circuit
US7969239B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2009 |
| Grant date | Jun 28, 2011 |
| Priority date | — |
| Expiry date | Oct 9, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/145
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A novel capacitor for use in a charge pump circuit has a substrate with a planar surface. A first electrode is in a first plane spaced apart from the planar surface. A second electrode is adjacent to and is spaced apart from the first electrode in the first plane and is capacitively coupled thereto. A third electrode is in a second plane, spaced apart from the first plane and is capacitively coupled to the first electrode. A fourth electrode is adjacent to and spaced apart from the third electrode in the second plane and is capacitively coupled to the third electrode and capacitively coupled to the second electrode. The first and fourth electrodes are electrically connected together and the second and third electrodes are electrically connected together. In addition, a cylindrical shape electrode, and a great wall electrode, and charge pump capacitor-by-pattern-filling is disclosed. A charge pump circuit using the foregoing described capacitor has a plurality of transistors for charging the capacitor and discharging the capacitor thereby increasing the voltage of the charge pump circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.