Systems and methods for efficient generation of hash values of varying bit widths
US7970128B2 · kind B2 · utility
3Cited by
3References
20Claims
0Family size
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Key dates
| Filing date | Jul 20, 2007 |
| Grant date | Jun 28, 2011 |
| Priority date | — |
| Expiry date | Apr 26, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/14
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A technique for producing a hashed output of an input message according to any number of hash algorithms (e.g. SHA-256, SHA-348, SHA-512) having varying bit widths is described. At least a portion of the input message is stored in a first group of registers each having a bit width equal to a first bit width (e.g. 32 bits). If the selected hash algorithm has a larger bit width (e.g. 64 bits), a remainder of the input message is stored in a second plurality of registers each having a bit width equal to the first bit width. The hashed output is then computed according to the selected hash algorithm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.