Deadlock-resistant bus bridge with pipeline-restricted address ranges
US7970977B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2009 |
| Grant date | Jun 28, 2011 |
| Priority date | — |
| Expiry date | May 23, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4036
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of bridging a plurality of buses within a bus bridge can include determining whether a queue of the bus bridge includes a transaction request directed to a restricted address range and, for each received transaction request, determining whether an address to which the transaction request is directed is within the restricted address range. Each transaction request received by the bus bridge can be selectively rejected according to whether the address to which the transaction request is directed is within the restricted address range and whether the queue includes a transaction request directed to the restricted address range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.