Isolated tri-gate transistor fabricated on bulk substrate
US7973389B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 2009 |
| Grant date | Jul 5, 2011 |
| Priority date | — |
| Expiry date | Nov 10, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
Abstract
A method of forming an isolated tri-gate semiconductor body comprises patterning a bulk substrate to form a fin structure, depositing an insulating material around the fin structure, recessing the insulating material to expose a portion of the fin structure that will be used for the tri-gate semiconductor body, depositing a nitride cap over the exposed portion of the fin structure to protect the exposed portion of the fin structure, and carrying out a thermal oxidation process to oxidize an unprotected portion of the fin structure below the nitride cap. The oxidized portion of the fin isolates the semiconductor body that is being protected by the nitride cap. The nitride cap may then be removed. The thermal oxidation process may comprise annealing the substrate at a temperature between around 900° C. and around 1100° C. for a time duration between around 0.5 hours and around 3 hours.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.