IC having programmable digital logic cells
US7973557B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2009 |
| Grant date | Jul 5, 2011 |
| Priority date | — |
| Expiry date | Apr 30, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17728
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) includes at least one programmable digital logic cell that includes first dedicated digital logic cell having a plurality of transistors including at least one PMOS transistor and at least one NMOS transistor configured to perform at least one digital logical function. The first dedicated digital logic cell includes a plurality of nodes including at least one input node and at least one output node that reflects performance of a digital logical function. Programmable tuning circuitry includes at least one tuning input and at least one tuning circuit output. Circuitry for coupling or decoupling the tuning input or tuning circuit output to at least one of the plurality of nodes of the first dedicated digital logical cell is provided, wherein the coupling or decoupling is operable to change the processing speed for the first reprogrammable digital logic cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.