Memory with tunable sleep diodes
US7974144B2 · kind B2 · utility
1Cited by
2References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 27, 2007 |
| Grant date | Jul 5, 2011 |
| Priority date | — |
| Expiry date | Feb 14, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/413
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and are described as to adjusting voltages in a memory device, while the device is in sleep mode, to prevent or minimize voltage or current leakage of the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.