Strained silicon with elastic edge relaxation
US7977147B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 22, 2009 |
| Grant date | Jul 12, 2011 |
| Priority date | — |
| Expiry date | Sep 22, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
A thin blanket epitaxial layer of SiGe is grown on a silicon substrate to have a biaxial compressive stress in the growth plane. A thin epitaxial layer of silicon is deposited on the SiGe layer, with the SiGe layer having a thickness less than its critical thicknesses. Shallow trenches are subsequently fabricated through the epitaxial layers, so that the strain energy is redistributed such that the compressive strain in the SiGe layer is partially relaxed elastically and a degree of tensile strain is induced to the neighboring layers of silicon. Because this process for inducing tensile strain in a silicon over-layer is elastic in nature, the desired strain may be achieved without formation of misfit dislocations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.