Method of fabricating a buried-gate semiconductor device and corresponding integrated circuit
US7977187B2 · kind B2 · utility
4Cited by
6References
25Claims
0Family size
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Key dates
| Filing date | Feb 17, 2009 |
| Grant date | Jul 12, 2011 |
| Priority date | — |
| Expiry date | May 6, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6757
Abstract
A semiconductor device includes a semiconductive channel region and a gate region. The gate region has at least one buried part extending under the channel region. The buried part of the gate region is formed by forming a cavity under the channel region. That cavity is at least partial filled with silicon and a metal. An annealing step is performed so as to form a silicide of said metal in the cavity. The result is a totally silicided buried gate for the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.