Bias generator providing for low power, self-biased delay element and delay line
US7977985B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 19, 2009 |
| Grant date | Jul 12, 2011 |
| Priority date | — |
| Expiry date | Jan 1, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00065
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An improved bias generator incorporates a reference voltage and/or a reference current into the generation of bias voltages. In some cases, the output of a biased delay element has a constant voltage swing. A delay line of such constant output voltage swing delay elements may be shown to provide reduced power consumption compared to some known self-biased delay lines. Furthermore, in other cases, providing the reference current to a novel bias generator allows a delay line of delay elements biased by such a novel bias generator to show reduced sensitivity to operating conditions, reduced sensitivity to variation in process parameters and improved signal quality, thereby providing more robust operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.