System and method for faceting the corners of a resistor protect layer to reduce vertical step height
US7982287B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 11, 2009 |
| Grant date | Jul 19, 2011 |
| Priority date | — |
| Expiry date | Jun 23, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/85
Abstract
A system and method is disclosed for providing a resistor protect layer to protect a thin film resistor in a semiconductor device. A thin film resistor is formed on a dielectric layer and a resistor protect layer is placed over the thin film resistor. An etch procedure is employed to facet the corners of the resistor protect layer. The faceted corners of the resistor protect layer reduce the step height of the resistor protect layer. Then a conductor is deposited over the resistor protect layer and the dielectric layer. When portions of the conductor are subsequently etched away, the resistor protect layer protects the underlying thin film resistor from being exposed to the etch process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.