Computer configuration virtual topology discovery and instruction therefore
US7984275B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2010 |
| Grant date | Jul 19, 2011 |
| Priority date | — |
| Expiry date | May 13, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2009/45566
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a logically partitioned host computer system comprising host processors (host CPUs), a facility and instruction for discovering topology of one or more guest processors (guest CPUs) of a guest configuration comprises a guest processor of the guest configuration fetching and executing a STORE SYSTEM INFORMATION instruction that obtains topology information of the computer configuration. The topology information comprising nesting information of processors of the configuration and the degree of dedication a host processor provides to a corresponding guest processor. The information is preferably stored in a single table in memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.