Embedded DRAM integrated circuits with extremely thin silicon-on-insulator pass transistors

US7985633B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Jin Cai · Somers, US
• Josephine B. Chang · Mahopac, US
• Leland Chang · New York, US
• Brian L. Ji · Fishkill, US
• Steven J. Koester · Toledo, US
• Amlan Majumdar · White Plains, US

Key dates

• Filing date: Oct 30, 2007
• Grant date: Jul 26, 2011
• Expiry date: May 10, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/01

Abstract

Integrated circuits having combined memory and logic functions are provided. In one aspect, an integrated circuit is provided. The integrated circuit comprises: a substrate comprising a silicon layer over a BOX layer, wherein a select region of the silicon layer has a thickness of between about three nanometers and about 20 nanometers; at least one eDRAM cell comprising: at least one pass transistor having a pass transistor source region, a pass transistor drain region and a pass transistor channel region formed in the select region of the silicon layer; and a capacitor electrically connected to the pass transistor.