Patent · US Active

Method of making a semiconductor structure useful in making a split gate non-volatile memory cell

US7985649B1 · kind B1 · utility

13Cited by
12References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 7, 2010
Grant dateJul 26, 2011
Priority date
Expiry dateFeb 5, 2030

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/035

Abstract

A method of making a semiconductor device on a semiconductor layer is provided. The method includes: forming a select gate dielectric layer over the semiconductor layer; forming a select gate layer over the select gate dielectric layer; and forming a sidewall of the select gate layer by removing at least a portion of the select gate layer. The method further includes growing a sacrificial layer on at least a portion of the sidewall of the select gate layer and under at least a portion of the select gate layer and removing the sacrificial layer to expose a surface of the at least portion of the sidewall of the select gate layer and a surface of the semiconductor layer under the select gate layer. The method further includes forming a control gate dielectric layer, a charge storage layer, and a control gate layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.