Handling of hard errors in a cache of a data processing apparatus
US7987407B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 20, 2009 |
| Grant date | Jul 26, 2011 |
| Priority date | — |
| Expiry date | Sep 22, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/126
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processor includes a cache record error storage and a hard error storage having at least one record error storage and at least one hard error record, respectively, both for keeping track of errors detected when accessing cache records. When an error is first detected, one of the error records in the cache record error storage is allocated to store a cache record identifier for that cache record, and an associated count value is set to a first value. If an error is detected when accessing a cache record, a correction operation is performed in respect of that currently accessed cache record, and access to that currently accessed cache record is then re-performed. If the count value reaches a predetermined threshold value, then the cache record identifier is moved from the cache record error storage to an error record of the hard error storage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.