Fault dictionaries for integrated circuit yield and quality analysis methods and systems

US7987442B2 · kind B2 · utility

Assignee

• MENTOR GRAPHICS CORPORATION · US

Inventors

• Janusz Rajski · West Linn, US
• Gang Chen · Sammamish, US
• Martin Keim · Möhrendorf, DE
• Nagesh Tamarapalli · Wilsonville, US
• Manish Sharma · Sunnyvale, US
• Huaxing Tang · Wilsonville, US

Key dates

• Filing date: Sep 6, 2005
• Grant date: Jul 26, 2011
• Expiry date: Feb 16, 2029

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/2853
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Methods, apparatus, and systems for testing, analyzing, and improving integrated circuit yield and quality are disclosed herein. For example, in one exemplary embodiment, one or more fault dictionaries are generated for identifying one or more defect candidates from corresponding observation point combinations. In this exemplary method, the observation point combinations indicate the observation points of a circuit-under-test that captured faulty test values upon application of a respective test pattern. Further, the one or more fault dictionaries in one embodiment are generated by: (a) for a first defect candidate, storing one or more first indicators indicative of test patterns detecting the first defect candidate, and (b) for a second defect candidate, storing at least a second indicator indicative of the test patterns that detect the second defect candidate, the second indicator comprising a bit mask that indicates which of the test patterns detecting the first defect candidate also detect the second defect candidate.