Method of using electrical test structure for semiconductor trench depth monitor
US7989232B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2006 |
| Grant date | Aug 2, 2011 |
| Priority date | — |
| Expiry date | Mar 27, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments provide a method and device for electrically monitoring trench depths in semiconductor devices. To electrically measure a trench depth, a pinch resistor can be formed in a deep well region on a semiconductor substrate. A trench can then be formed in the pinch resistor. The trench depth can be determined by an electrical test of the pinch resistor. The disclosed method and device can provide statistical data analysis across a wafer and can be implemented in production scribe lanes as a process monitor. The disclosed method can also be useful for determining device performance of LDMOS transistors. The on-state resistance (Rdson) of the LDMOS transistors can be correlated to the electrical measurement of the trench depth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.