Methods of forming integrated circuit devices having anisotropically-oxidized nitride layers
US7989333B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2009 |
| Grant date | Aug 2, 2011 |
| Priority date | — |
| Expiry date | Oct 8, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/015
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming integrated circuit devices include forming a gate electrode on a substrate and forming a nitride layer on a sidewall and upper surface of the gate electrode. The nitride layer is then anisotropically oxidized under conditions that cause a first portion of the nitride layer extending on the upper surface of the gate electrode to be more heavily oxidized relative to a second portion of the nitride layer extending on the sidewall of the gate electrode. A ratio of a thickness of an oxidized first portion of the nitride layer relative to a thickness of an oxidized second portion of the nitride layer may be in a range from about 3:1 to about 7:1.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.