Capacitor arrangement and method for making same

US7989919B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Josef Boeck · Putzbrunn, DE
• Karl-Heinz Allers · Haar, DE
• Klaus Goller · Dresden, DE
• Rudolf Lachner · Ingolstadt, DE
• Wolfgang Liebl · Bad Abbach, DE

Key dates

• Filing date: Jun 3, 2009
• Grant date: Aug 2, 2011
• Expiry date: Jun 3, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

One or more embodiments relate to a semiconductor chip including a capacitor arrangement, the capacitor arrangement comprising: a first capacitor; and a second capacitor stacked above the first capacitor, the first capacitor and the second capacitor coupled in series between a first metallization level and a second metallization level adjacent the first metallization level.