Duty cycle correction circuits having short locking times that are relatively insensitive to temperature changes
US7990195B2 · kind B2 · utility
1Cited by
4References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2009 |
| Grant date | Aug 2, 2011 |
| Priority date | — |
| Expiry date | Oct 22, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A duty cycle correction circuit includes a duty cycle correction portion that is configured to output a correction signal that is obtained by correcting a duty cycle of an input signal and to output a delayed signal that is obtained by delaying the correction signal, a complementary portion that is configured to output a complementary signal that is the complement of the delayed signal, and a phase interpolator that is configured to phase interpolate the complementary signal and the correction signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.