Ball grid array stack
US7990727B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 31, 2007 |
| Grant date | Aug 2, 2011 |
| Priority date | — |
| Expiry date | May 29, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49126
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The invention discloses a device comprising a stack of at least two layers, which may comprise active or passive discrete components, TSOP and/or ball grid array packages, flip chip or wire bonded bare die or the like, which layers are stacked and interconnected to define an integral module. A first and second layer comprise an electrically conductive trace with one or more electronic components in electrical connection therewith. The electrically conductive traces terminate at a lateral surface of each of the layers to define an access lead. An interposer structure is disposed between the layers and provides an interposer lateral surface upon which a conductive layer interconnect trace is defined to create an electrical connection between predetermined access leads on each of the layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.