Semiconductor memory device with optimum refresh cycle according to temperature variation
US7990776B2 · kind B2 · utility
14Cited by
5References
24Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 29, 2004 |
| Grant date | Aug 2, 2011 |
| Priority date | — |
| Expiry date | Dec 21, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/4061
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device, which performs a refresh operation, includes: a temperature sensing unit for measuring temperature and for generating a temperature controlled voltage and a reference current based on the measured temperature; an analog-digital conversion unit for converting the temperature controlled voltage to an N-bit digital signal; a refresh control unit for generating a refresh signal in response to the N-bit digital signal, wherein, a period of the refresh signal is controlled based on the N-bit digital signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.