Conversion of a high-level graphical circuit design block to a high-level language program
US7992111B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2009 |
| Grant date | Aug 2, 2011 |
| Priority date | — |
| Expiry date | Jan 14, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Approaches for processing an electronic circuit design. In one embodiment, the graphical model of an outer subsystem block and an inner subsystem block are translated into a high-level language (HLL) program. The HLL program includes a specification of a first function corresponding to the outer subsystem block and within the specification of the first function a specification of a second function corresponding to the inner subsystem block. The specification of the first function references a parameter of the outer subsystem block and specifies invocation of the second function. The specification of the second function specifies invocation of a third function corresponding to a leaf block in the inner subsystem block. The specification of the first function references a variable corresponding to the parameter, and that variable is referenced by the second or third functions. Execution of the HLL program instantiates a model of the design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.