Memory errors
US7996711B2 · kind B2 · utility
8Cited by
11References
46Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 26, 2008 |
| Grant date | Aug 9, 2011 |
| Priority date | — |
| Expiry date | Jul 1, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1417
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method of protecting against errors in a boot memory, the method comprising initiating booting of a processor by executing primary boot code from a primary boot memory, and based on the execution of the primary boot code: accessing a data structure comprising a plurality of redundant portions of boot information stored on a secondary boot memory; performing an error check on a plurality of the portions to determine whether those portions contain errors and, based on the error checks, to identify a valid portion; and booting the processor using the valid portion of boot information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.