Circuit arrangement and method for checking the function of a logic circuit in a circuit arrangement

US7996742B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Marcus Janke · Munich, DE
• Franz Klug · Munich, DE
• Peter Laackmann · Munich, DE
• Dirk Rabe · Munich, DE
• Stefan Rueping · Lengdorf, DE

Key dates

• Filing date: Nov 10, 2008
• Grant date: Aug 9, 2011
• Expiry date: Aug 5, 2029

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/3177
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A circuit arrangement comprising a logic circuit to be tested and a test circuit. The logic circuit comprising logic-circuit-internal combinations configured to generate output data from input data based on a predetermined relationship. The logic circuit is configured to detect whether the relationship is satisfied and to provide an error signal if the relationship is not satisfied. The test circuit is configured to alter logic-circuit-internal combinations, to detect the error signal, and to output an alarm signal if the error signal is not detected upon alteration of the logic-circuit-internal combinations.