Single gate nonvolatile memory cell with transistor and capacitor
US7999296B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2008 |
| Grant date | Aug 16, 2011 |
| Priority date | — |
| Expiry date | Sep 15, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/60
Abstract
A nonvolatile memory integrated circuit has a semiconductor substrate and a nonvolatile memory device on the semiconductor substrate. The device has a transistor and a capacitor on the semiconductor substrate, and a shared floating gate connecting the gate regions of the transistor and the capacitor. The transistor has at least a doping region defining the source and drain regions, as well as three other doping regions overlapping the source and drain regions. Also disclosed are a nonvolatile memory circuit with multiple such nonvolatile memory device, and methods for making the nonvolatile memory circuit with one or more such nonvolatile memory devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.