Technique for stable processing of thin/fragile substrates
US7999348B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2008 |
| Grant date | Aug 16, 2011 |
| Priority date | — |
| Expiry date | Dec 9, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/78
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor on insulator (SOI) wafer includes a semiconductor substrate having first and second main surfaces opposite to each other. A dielectric layer is disposed on at least a portion of the first main surface of the semiconductor substrate. A device layer has a first main surface and a second main surface. The second main surface of the device layer is disposed on a surface of the dielectric layer opposite to the semiconductor substrate. A plurality of intended die areas are defined on the first main surface of the device layer. The plurality of intended die areas are separated from one another. A plurality of die access trenches are formed in the semiconductor substrate from the second main surface. Each of the plurality of die access trenches are disposed generally beneath at least a respective one of the plurality of intended die areas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.