Methods and systems for reusing memory addresses in a graphics system
US7999820B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2007 |
| Grant date | Aug 16, 2011 |
| Priority date | — |
| Expiry date | May 21, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/122
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems for reusing memory addresses in a graphics system are disclosed, so that instances of address translation hardware can be reduced. One embodiment of the present invention sets forth a method, which includes mapping a footprint on a display screen to a group of contiguous physical memory locations in a memory system, determining an anchor physical memory address from a first transaction associated with the footprint, wherein the anchor physical memory address corresponds to an anchor in the group of contiguous physical memory locations, determining a second transaction that is also associated with the footprint, determining a set of least significant bits (LSBs) associated with the second transaction, and combining the anchor physical memory address with the set of LSBs associated with the second transaction to generate a second physical memory address for the second transaction, thereby avoiding a second full address translation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.