Compensation for voltage drifts in analog memory cells
US8000141B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2008 |
| Grant date | Aug 16, 2011 |
| Priority date | — |
| Expiry date | Oct 7, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for data storage includes storing data in a group of analog memory cells by writing respective first storage values into the memory cells. After storing the data, respective second storage values are read from the memory cells. A subset of the memory cells, in which the respective second storage values have drifted below a minimum readable value, is identified. The memory cells in the subset are operated on, so as to cause the second storage values of at least one of the memory cells in the subset to exceed the minimum readable value. At least the modified second storage values are re-read so as to reconstruct the stored data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.