Automated method of architecture mapping selection from constrained high level language description via element characterization
US8001510B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 2008 |
| Grant date | Aug 16, 2011 |
| Priority date | — |
| Expiry date | Oct 29, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosure is made of approaches for mapping an electronic design specification to an implementation. In one approach, quality metrics are associated with functional units of the design, and the functional units are mapped to respective initial implementations. For each functional unit a respective quality indicator is determined based on the mapping. The quality indicator specifies a degree to which the functional unit achieves the associated quality metric. At least one of the functional units is selected for remapping based on the quality indicator of that functional unit or the quality indicator of another functional unit. An alternative implementation to the initial implementation is selected for each selected functional unit to improve the quality indicator. The selected functional unit is remapped to the selected alternative implementation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.