Field effect transistor

US8004022B2 · kind B2 · utility

Assignee

• SHARP KABUSHIKI KAISHA · JP

Inventors

• Norimasa Yafune · Nara, JP
• John Twynam · Regensburg, DE

Key dates

• Filing date: Jan 6, 2009
• Grant date: Aug 23, 2011
• Expiry date: Aug 1, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/8503

Abstract

A field effect transistor includes a GaN epitaxial substrate, a gate electrode formed on an electron channel layer of the substrate, and source and drain electrodes arranged spaced apart by a prescribed distance on opposite sides of the gate electrode. The source and drain electrodes are in ohmic contact with the substrate. At an upper portion of the gate electrode, a field plate is formed protruding like a visor to the side of drain electrode. Between the electron channel layer of the epitaxial substrate and the field plate, a dielectric film is formed. The dielectric film is partially removed at a region immediately below the field plate, to be flush with a terminal end surface of the field plate. The dielectric film extends from a lower end of the removed portion to the drain electrode, to be overlapped on the drain electrode.