Semiconductor memory device and method for operating the same
US8004336B2 · kind B2 · utility
9Cited by
4References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 1, 2008 |
| Grant date | Aug 23, 2011 |
| Priority date | — |
| Expiry date | Nov 14, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0814
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes an edge detector configured to receive two pairs of complementary clocks to detect edges of the clocks, a comparator configured to compare output signals of the edge detector to detect whether clocks of the same pair have a phase difference of 180 degrees and detect whether clocks of different pairs have a phase difference of 90 degrees, a control signal generator configured to generate a control signal for controlling phases of the clocks according to an output signal of the comparator, and a phase corrector configured to correct phases of the clocks in response to the control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.