Method of fabricating a semiconductor device with multiple channels
US8008141B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2009 |
| Grant date | Aug 30, 2011 |
| Priority date | — |
| Expiry date | Jan 7, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/674
Abstract
A semiconductor device with multiple channels includes a semiconductor substrate and a pair of conductive regions spaced apart from each other on the semiconductor substrate and having sidewalls that face to each other. A partial insulation layer is disposed on the semiconductor substrate between the conductive regions. A channel layer in the form of at least two bridges contacts the partial insulation layer, the at least two bridges being spaced apart from each other in a first direction and connecting the conductive regions with each other in a second direction that is at an angle relative to the first direction. A gate insulation layer is on the channel layer, and a gate electrode layer on the gate insulation layer and surrounding a portion of the channel layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.