Capacitor assemblies

US8008161B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Jens Bachmann · Langen, DE
• Bernd Föste · Dresden, DE
• Klaus Goller · Dresden, DE
• Jakob Kriz · Ochtrup, DE

Key dates

• Filing date: Jun 20, 2005
• Grant date: Aug 30, 2011
• Expiry date: Jul 11, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/212

Abstract

A method for fabricating a capacitor arrangement which includes at least three electrodes is described. The capacitor arrangement is fabricated using a number of lithography methods that is smaller than the number of electrodes. A capacitor arrangement extending over more than two or more interlayers between metallization layers has a high capacitance per unit area and can be fabricated in a simple way is also described. The circuit arrangement has a high capacitance per unit area and can be fabricated in a simple way. An electrode layer is first patterned using a dry-etching process and residues of the electrode layer are removed using a wet-chemical process, making it possible to fabricate capacitors with excellent electrical properties.