Multi-transistor non-volatile memory element
US8008702B2 · kind B2 · utility
7Cited by
4References
6Claims
0Family size
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Key dates
| Filing date | Feb 20, 2008 |
| Grant date | Aug 30, 2011 |
| Priority date | — |
| Expiry date | Jun 20, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/685
Abstract
A multi-transistor element including a substrate, a first floating gate disposed on the substrate, a second floating gate disposed on the substrate and coupled to the first floating gate, and a first active region disposed in the substrate and coupled to the first and second floating gates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.