Shih-Wei Wang
52Patents
7h-index
105Co-inventors
75Inventor score
Filing activity: Feb 9, 1998 → Mar 29, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8912769B2 | Current mode buck-boost converter | Electricity | 22 | Active |
| US7326994B2 | Logic compatible non-volatile memory cell | Electricity | 11 | Expired |
| US6930348B2 | Dual bit split gate flash memory | Physics | 10 | Expired |
| US5955200A | Structure for reducing stress between metallic layer and spin-on-glass layer | Electricity | 8 | Expired |
| US8363033B2 | Capacitance sensing circuit | Physics | 8 | Active |
| US8809179B2 | Method for reducing topography of non-volatile memory and resulting memory cells | Electricity | 7 | Active |
| US8008702B2 | Multi-transistor non-volatile memory element | Electricity | 7 | Active |
| US9740223B1 | Regulator | Physics | 6 | Active |
| US7495960B2 | Program methods for split-gate memory | Physics | 5 | Active |
| US7701767B2 | Strap-contact scheme for compact array of memory cells | Electricity | 5 | Active |
| US9395791B2 | Health care device and power management method therefor | Emerging Cross-Sectional Technologies | 4 | Active |
| US7880217B2 | Programmable non-volatile memory (PNVM) device | Electricity | 3 | Expired |
| US9195244B2 | Voltage regulating apparatus with enhancement functions for transient response | Physics | 2 | Active |
| US9760105B1 | Regulator | Electricity | 2 | Active |
| US10074731B2 | Method for forming semiconductor device structure | Electricity | 1 | Active |
| US10355095B2 | FinFET structure with composite gate helmet | Electricity | 1 | Active |
| US10505004B2 | Fabrication method of FinFET structure with composite gate helmet | Electricity | 1 | Active |
| US10437298B2 | Lifting mechanism and electronic device | Electricity | 1 | Active |
| US9882069B2 | Biasing voltage generating circuit for avalanche photodiode and related control circuit | Physics | 1 | Active |
| US8247293B2 | Non-volatile memory cells formed in back-end-of-line processes | Electricity | 0 | Active |
| US11444173B2 | Semiconductor device structure with salicide layer and method for forming the same | Electricity | 0 | Active |
| US9678146B2 | Temperature insensitive testing device and method | Electricity | 0 | Active |
| US10627891B2 | Power supply system and power supply method | Physics | 0 | Active |
| US8384149B2 | Memory cell having a shared programming gate | Electricity | 0 | Active |
| US10748813B2 | Fin-like field effect transistor device | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.