Integrated micro-channels for 3D through silicon architectures
US8012808B2 · kind B2 · utility
15Cited by
6References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2008 |
| Grant date | Sep 6, 2011 |
| Priority date | — |
| Expiry date | Jun 24, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Some embodiments of the present invention include apparatuses and methods relating to integrated micro-channels for removing heat from 3D through silicon architectures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.