Wake-and-go mechanism with exclusive system bus response
US8015379B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2008 |
| Grant date | Sep 6, 2011 |
| Priority date | — |
| Expiry date | Apr 6, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/521
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A wake-and-go mechanism is configured to issue a look-ahead load command on a system bus to read a data value from a target address and perform a comparison operation to determine whether the data value at the target address indicates that an event for which a thread is waiting has occurred. In response to the comparison resulting in a determination that the event has not occurred, the wake-and-go engine populates the wake-and-go storage array with the target address. In response to the comparison resulting in a determination that the event has occurred, the wake-and-go engine issues a load command on the system bus to read the data value from the target address with data exclusivity and determines whether the wake-and-go engine obtains a lock for the target address. Responsive to obtaining the lock for the target address, the wake-and-go engine holds the lock for the thread.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.