System for implementing post-silicon IC design changes
US8015522B2 · kind B2 · utility
9Cited by
17References
16Claims
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Key dates
| Filing date | Dec 29, 2008 |
| Grant date | Sep 6, 2011 |
| Priority date | — |
| Expiry date | Nov 6, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An engineering change order (ECO) modifying an IC having spare cell instances is implemented by converting active cell instances implementing portions of the IC to be deleted into additional spare cell instances, by creating a technology independent behavioral model of portions of the IC to be added, by selecting spare cell instances to implement the behavior model, and by routing nets to the selected spare cell instances in a way that minimizes a number of metal layers of the IC that are modified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.