Springsoft USA, Inc.
22Patents
21Active
22Granted
44Portfolio score
Filing activity: Jul 12, 2005 → Jan 13, 2012 · 20 expiring within 5 years
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7478346B2 | Debugging system for gate level IC designs | Physics | 22 | Active |
| US7984410B2 | Hierarchy-based analytical placement method for an integrated circuit | Physics | 14 | Active |
| US8176453B2 | Power-aware debugging | Physics | 14 | Active |
| US7707536B2 | V-shaped multilevel full-chip gridless routing | Physics | 13 | Active |
| US7873928B2 | Hierarchical analog IC placement subject to symmetry, matching and proximity constraints | Physics | 10 | Active |
| US8015522B2 | System for implementing post-silicon IC design changes | Physics | 9 | Active |
| US8281280B2 | Method and apparatus for versatile controllability and observability in prototype system | Physics | 8 | Active |
| US7739630B1 | Optimizing a circuit design | Physics | 8 | Active |
| US8086982B2 | Methods and systems for reducing clock skew in a gated clock tree | Physics | 8 | Active |
| US7571086B2 | Incremental circuit re-simulation system | Physics | 4 | Active |
| US7574681B2 | Method and system for evaluating computer program tests by means of mutation analysis | Physics | 4 | Expired |
| US8311793B2 | Method for evaluating a test program quality | Physics | 4 | Active |
| US8261223B2 | Hierarchy-based analytical placement method capable of macro rotation within an integrated circuit | Physics | 3 | Active |
| US8407647B2 | Systems and methods for designing and making integrated circuits with consideration of wiring demand ratio | Physics | 3 | Active |
| US8296708B1 | Method of constraint-hierarchy-driven IC placement | Physics | 2 | Active |
| US7779379B2 | Template-based gateway model routing system | Physics | 2 | Active |
| US8359559B2 | Methods and systems for evaluating checker quality of a verification environment | Physics | 2 | Active |
| US7917881B1 | Timing of a circuit design | Physics | 1 | Active |
| US8010919B2 | Method for evaluating the quality of a computer program | Physics | 1 | Active |
| US7877718B2 | Analog IC placement using symmetry-islands | Physics | 1 | Active |
| US8255853B2 | Circuit emulation systems and methods | Physics | 1 | Active |
| US8359560B2 | Methods and systems for debugging equivalent designs described at different design levels | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.