Semiconductor chip package fixture
US8017434B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 24, 2008 |
| Grant date | Sep 13, 2011 |
| Priority date | — |
| Expiry date | Mar 13, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/5327
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Various methods and apparatus for holding a semiconductor chip package are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first plate adapted to hold a semiconductor chip package. The semiconductor chip package includes a carrier substrate and at least one semiconductor chip coupled to the carrier substrate. A second plate is formed with a first opening defining an interior peripheral surface adapted to compress an outer edge of the carrier substrate between the first plate and the second plate without engaging the at least one semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.