Patent · US Active

Integrated circuit package system with stacked devices

US8018039B2 · kind B2 · utility

0Cited by

4References

20Claims

0Family size

Assignee

STATS ChipPAC, Ltd. · SG

Inventors

Jae Hak Yee · Shanghai, CN
Frederick Cruz Santos · Shanghai, CN
Yong Yong Xia · 安丰镇, CN
Jun Xu · Plano, US

Key dates

Filing date	Mar 6, 2008
Grant date	Sep 13, 2011
Priority date	—
Expiry date	Aug 31, 2029

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/19107
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

An integrated circuit package system comprising: providing an integrated circuit die having an active side; forming a first internal stacked module and a second internal stacked module over the active side of the integrated circuit die; and coupling an electrical interconnect between the first internal stacked module or the second internal stacked module and the active side.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.