Patent assignee · SG · COMPANY

STATS ChipPAC, Ltd.

1,416Patents

1,361Active

1,416Granted

64Portfolio score

Filing activity: Mar 1, 2004 → May 27, 2016 · 861 expiring within 5 years

Most-cited patents

Patent	Title	Area	Cited by	Status
US8420447B2	Integrated circuit packaging system with flipchip leadframe and method of manufacture thereof	Electricity	267	Active
US9349700B2	Semiconductor device and method of forming stress-reduced conductive joint structures	Electricity	192	Active
US7429786B2	Semiconductor package including second substrate and having exposed substrate surfaces on upper and lower sides	Electricity	142	Active
US8193604B2	Semiconductor package with semiconductor core structure and method of forming the same	Electricity	136	Active
US8217502B2	Integrated circuit packaging system with multipart conductive pillars and method of manufacture thereof	Electricity	126	Active
US8304900B2	Integrated circuit packaging system with stacked lead and method of manufacture thereof	Electricity	118	Active
US7838337B2	Semiconductor device and method of forming an interposer package with through silicon vias	Electricity	115	Active
US7517733B2	Leadframe design for QFN package with top terminal leads	Electricity	115	Active
US6940169B2	Torch bump	Electricity	114	Expired
US8232141B2	Integrated circuit packaging system with conductive pillars and method of manufacture thereof	Electricity	111	Active
US8354297B2	Semiconductor device and method of forming different height conductive pillars to electrically interconnect stacked laterally offset semiconductor die	Electricity	105	Active
US9224647B2	Semiconductor device and method of forming TSV interposer with semiconductor die and build-up interconnect structure on opposing surfaces of the interposer	Electricity	97	Active
US8097490B1	Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die	Electricity	97	Active
US7642128B1	Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP	Electricity	97	Active
US8796846B2	Semiconductor device with a vertical interconnect structure for 3-D FO-WLCSP	Electricity	95	Active
US8008121B2	Semiconductor package and method of mounting semiconductor die to opposite sides of TSV substrate	Electricity	95	Active
US8263434B2	Semiconductor device and method of mounting die with TSV in cavity of substrate for electrical interconnect of Fi-PoP	Electricity	95	Active
US7902644B2	Integrated circuit package system for electromagnetic isolation	Electricity	95	Active
US8264091B2	Integrated circuit packaging system with encapsulated via and method of manufacture thereof	Electricity	94	Active
US7928552B1	Integrated circuit packaging system with multi-tier conductive interconnects and method of manufacture thereof	Electricity	93	Active
US8742579B2	Semiconductor device and method of providing Z-interconnect conductive pillars with inner polymer core	Electricity	90	Active
US8518746B2	Semiconductor device and method of forming TSV semiconductor wafer with embedded semiconductor die	Electricity	89	Active
US8980691B2	Semiconductor device and method of forming low profile 3D fan-out package	Electricity	86	Active
US8039303B2	Method of forming stress relief layer between die and interconnect structure	Electricity	84	Active
US7288835B2	Integrated circuit package-in-package system	Electricity	77	Expired

Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.