Memory module including voltage sense monitoring interface
US8018753B2 · kind B2 · utility
7Cited by
2References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2008 |
| Grant date | Sep 13, 2011 |
| Priority date | — |
| Expiry date | Sep 16, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/147
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory devices and systems include a voltage sense line for addressing voltage tolerances across variable loadings. The memory devices and systems comprise a memory module connector with a first plurality of pins coupled to circuitry on a memory module, and a second plurality of pins coupled to power rails on the memory module that enable monitoring of the power rails from external to the memory module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.