Inventor · Roseville, CA, US

Lidia Warnes

35Patents
8h-index
48Co-inventors
71Inventor score

Filing activity: Apr 25, 2007 → May 3, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US8116144B2 Memory module having a memory device configurable to different data pin configurations Physics 36 Active
US8539145B1 Increasing the number of ranks per channel Emerging Cross-Sectional Technologies 30 Active
US10699796B2 Validation of a repair to a selected row of data Physics 29 Active
US7739441B1 Communicating between a native fully buffered dual in-line memory module protocol and a double data rate synchronous dynamic random access memory protocol Physics 20 Active
US8473791B2 Redundant memory to mask DRAM failures Physics 14 Active
US7996602B1 Parallel memory device rank selection Physics 13 Active
US8225031B2 Memory module including environmental optimization Physics 12 Active
US7711887B1 Employing a native fully buffered dual in-line memory module protocol to write parallel protocol memory module channels Emerging Cross-Sectional Technologies 8 Active
US8018753B2 Memory module including voltage sense monitoring interface Physics 7 Active
US7741867B2 Differential on-line termination Electricity 6 Active
US8892942B2 Rank sparing system and method Physics 6 Active
US8020053B2 On-line memory testing Physics 6 Active
US9442801B2 Platform error correction Physics 6 Active
US9405339B1 Power controller Physics 5 Active
US8151009B2 Serial connection external interface from printed circuit board translation to parallel memory protocol Physics 5 Active
US9941023B2 Post package repair (PPR) data in non-volatile memory Physics 3 Active
US10402124B2 Dynamically composable computing system, a data center, and method for dynamically composing a computing system Physics 2 Active
US11693721B2 Creating robustness scores for selected portions of a computing infrastructure Physics 1 Active
US8812915B2 Determining whether a right to use memory modules in a reliability mode has been acquired Physics 1 Active
US10891185B2 Error counters on a memory device Physics 1 Active
US10068661B2 Post package repair (PPR) data in non-volatile memory Physics 1 Active
US7729126B2 Modular DIMM carrier and riser slot Electricity 1 Active
US9292392B2 Memory module that includes a memory module copy engine for copying data from an active memory die to a spare memory die Physics 1 Active
US11573722B2 Tenant based allocation for pooled memory Physics 1 Active
US10176043B2 Memory controller Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.