Transient thermal analysis
US8019580B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2008 |
| Grant date | Sep 13, 2011 |
| Priority date | — |
| Expiry date | Jul 14, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Transient thermal simulation of semiconductor chips uses region-wise variable spatial grids and variable temporal intervals, enabling spatio-temporal thermal analysis of semiconductor chips. Temperature rates of change across a die and/or package of an integrated circuit are computed and tracked versus time. Critical time interval(s) for temperature evaluation are determined. Temperatures of elements, components, devices, and interconnects are updated based on a 3D full chip temperature analysis. Respective power dissipations are updated, as a function of the temperatures, with an automated interface to one or more circuit simulation tools. Subsequently new temperatures are determined as a function of the power dissipations. User definable control and observation parameters enable flexible and efficient transient thermal analysis. The parameters relate to power sources, monitoring, reporting, error tolerances, and output snapshots. Viewing of waveform plots and 3D spatial variations of temperature enable efficient communication of results of the thermal analysis with designers of integrated circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.