On-line memory testing
US8020053B2 · kind B2 · utility
6Cited by
10References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2008 |
| Grant date | Sep 13, 2011 |
| Priority date | — |
| Expiry date | Sep 9, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of testing on-line and spare memory is disclosed. Such memory may currently store in-use data at some addresses. The testing is initiated upon an occurrence of a pre-selected condition. An address range is determined that excludes at least the addresses currently storing functional data. The address range is subjected to a test pattern, and errors in the address range are reported.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.