Voltage island performance/leakage screen monitor for IP characterization
US8020138B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2008 |
| Grant date | Sep 13, 2011 |
| Priority date | — |
| Expiry date | Mar 10, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2884
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method is provided for characterizing performance of a chip having at least one voltage island and at least one performance screen ring oscillator (PSRO). An on-chip performance monitor (OCPM) is incorporated on the voltage island. Performance measurements of the voltage island are generated with only the voltage island under power. Performance measurements of the performance screen ring oscillator (PSRO) are generated with only the voltage island under power. Performance measurements of the performance screen ring oscillator (PSRO) is compared to the performance measurements of the on-chip performance monitor (OCPM) to determine a systematic offset due to the voltage island. Performance models are adjusted using the systematic offset due to the voltage island.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.