Heterogeneous multiprocessor network on chip devices, methods and operating systems for control thereof
US8020163B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 24, 2004 |
| Grant date | Sep 13, 2011 |
| Priority date | — |
| Expiry date | Nov 5, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7825
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Network on Chip (NoC) Devices, especially Heterogeneous Multiprocessor Network on Chip Devices are described, that optionally contain Reconfigurable Hardware Tiles, as well as Methods and Operating Systems (OS) for Control thereof. In accordance with an aspect of the present invention the Operating Systems handle either (a) run-time traffic management methods or (b) task migration methods, or a combination of these methods. The Operating Systems may be partly distributed but with a centralized master. The traffic management methods and apparatus of the invention use a statistical QoS approach. A system is described having an at least dual Network on Chip as well as methods of operating the same. The system has at least an on-chip communications network, comprising a first on-chip data traffic network (data NoC) and a second on-chip control traffic network (control NoC), having a control network interface component (control NIC) and a data network interface component (data NIC).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.