Method to reduce inrush voltage and current in a switching power converter
US8022682B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2007 |
| Grant date | Sep 20, 2011 |
| Priority date | — |
| Expiry date | May 13, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S323/908
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A circuit for minimizing voltage inrush upon startup in a switching power converter having a switching stage including high and low switches connected at a common node, a feedback loop for maintaining a target output voltage, an output capacitor connected between an output node and the ground, an inductor connected between the common node and the output node, and a control circuit having a first error amplifier for providing a first signal based on a comparison of a reference voltage and voltage provided by the feedback loop, the control circuit including a level switch connected between the ground and the common node, the level switch being controlled in accordance with the first signal, wherein a large inrush current flowing into the output capacitor when the circuit is starting up is minimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.