Patent · US Active

Bit line voltage control in spin transfer torque magnetoresistive random access memory

US8027206B2 · kind B2 · utility

27Cited by

11References

19Claims

0Family size

Assignee

QUALCOMM Incorporated · US

Inventors

Sei Seung Yoon · San Diego, US
Seung H. Kang · San Diego, US

Key dates

Filing date	Jan 30, 2009
Grant date	Sep 27, 2011
Priority date	—
Expiry date	Jun 5, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/1659
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) and associated read operations are disclosed. A bit cell includes a magnetic tunnel junction (MTJ) and a word line transistor, the bit cell being coupled to a bit line and a source line. A clamping circuit is coupled to the bit line and is configured to clamp the bit line voltage to a desired voltage level during a read operation of the STT-MRAM to prevent the bit line voltage from exceeding the desired voltage level. The desired voltage level is less than a write voltage threshold associated with a write operation of the STT-MRAM.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.